Pixel Shader ALU

The diagram below shows the parallel pipeline structure of a pixel shader arithmetic logic unit (ALU). The left side is the vector pipeline, which operates on vector data. Vector data is also called color data and contains three channels (RGB) of data. The right side is the scalar pipeline, which operates on a single alpha data value. The pipeline is commonly referred to by the data type operated on, so the vector pipeline is commonly called the color pipe and the scalar pipeline is commonly called the alpha pipe.

Pixel shader arithmetic logic unit diagram

The blocks are identified below.

Input Registers - Pixel Shader Registers provide the RGBA input data for a pixel shader.
Component Copy - Source Register Selectors copy data from one channel into other channels. This is commonly called swizzling.

Modify Data - Source Register Modifiers modify data read from source registers before an instruction is run.
Execute Instruction - Pixel Shader 1_X are used to perform arithmetic and texture address operations on the pixel data. The color and alpha pipes do not have to run the same instruction or have the same source registers. For pixel shader version 1_4, destination registers may also be different across the two pipes.
Modify Result - Instruction Modifiers modify the result of the instruction before it is written to an output register.

Masking - Destination Register Write Masks control which components of the destination register are written by the instruction.
Output Register - Output Register - At the end of the shader, pixel shader register r0 contains the output color.