Microsoft DirectX 9.0

Registers - vs_3_0

One additional register is introduced in this version. This section contains reference information for the input and output registers implemented by vertex shader version 3_0.

Input Registers

NameRegister typeCountData typeDimensionI/O permissionsRead portRead / InstructionRel-AddressDefaultsRequires DCL
v#Input Register16floating-point4-D vectorread13noPartial(0001)yes
r#Temporary Register12 (1)floating-point4-D vectorread / write33nononeno
c#Constant Float Register256 (2)floating-point4-D vectordefine / read12a0 / aL(0, 0, 0, 0)no
i#Constant Integer Register16integer4-D vectordefine / use11no(0, 0, 0, 0)no
b#Constant Boolean Register16booleanscalardefine / use11noFALSEno
a0Address Register1integer4-D vectorwrite / use12nononeno
aLLoop Counter Register1integerscalaruse12 nononeno
p0Predicate1boolean4-D vectorwrite / use11nononeno
s#Sampler Register4R111NoNoneYesYes


(1) - 12 is the minimum r# register counted required by vs_2_x. The D3DCAPS9.VS20Caps.NumTemps cap contains the actual r# register count supported by the device. See D3DCAPS9.

(2) - 256 is the minimum c# register count required by vs_2_x. The MaxVertexShaderConst cap contains the actual c# register count supported by the device. See D3DCAPS9.

Register Defaults

It is unwise to use uninitialized address or temporary registers. All other defaults are specified in the table above.

Output Registers

Output registers have been collapsed into 12 o# (output) registers. These can be used for anything the user wants to interpolate for the pixel shader: texture coordinates, colors, fog, etc.

Register typeCountR/W# Read ports# Reads/instDimensionRelAddrDefaultsRequires DCLNew
Output Register - on12WN/AN/A4aL onlyNoneYesYes

Output declarations are introduced, whereby semantics are assigned to each register. Old oPos and oPts are replaced by declaring an o register with a position or pointsize semantic, further described below.

See dcl_usage for examples declaring output registers.

Indexing Registers Extended

In the earlier shader models, only the constant register bank could be indexed. In this model, the following register banks can be indexed using the loop counter register (aL).

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