Microsoft DirectX 9.0

Masking (Pixel Shader)

A write mask controls which components of a destination register are written after an instruction is completed. An output write mask is allowed as long as the components are in the order of .rgba or .xyzw. That is, .rba and .xw are valid masks. Texture registers have one set of rules and non-texture registers have another set of rules.

Destination Register Masking

As shown in the following table, masking can be applied to the individual components of a destination register.

Component modifier Description
r.{x}{y}{z}{w} Destination mask

In general, specifying destination register write masks is good coding style. It makes code easier to read and maintain. Any combination of components may be specified (including none) as long as x precedes y, y precedes z, and z precedes w.

The following output registers have restrictions for write mask:

Register TypeRequired Write Mask
oFogno explicit write mask allowed on a scalar register
oPtsno explicit write mask allowed on a scalar register
oPoscombined mask: .xyzw(which is the default)
oT#combined mask: .x | .xy | .xyz | .xyzw (which is the default)

The following versions support masking.

Pixel shader versions1_11_21_31_42_02_x2_sw3_03_sw
destination register maskingxxxxxxxxx

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