Microsoft DirectX 9.0

Pixel Shader 3_0

A programmable pixel shader is made up of a set of instructions that operate on pixel data. Registers transfer data in and out of the ALU. Additional control can be applied to modify the instruction, the results, or what data gets written out.

New Features

Add a face register. Add a position register. Color registers (v#) are now fully floating point and the texture coordinate registers (t#) have been consolidated. Input declarations take the usage names, and multiple usages are permitted for components of a given register.

Dynamic Flow Control

The device supports dynamic flow control (if, break, and break_comp). The depth of nesting ranges from 0 to 24.

Number of Temporary Registers

The number of temporary registers supported is 32.

Static Flow Control Nesting Depth

The call/callnz/call_pred can be nested to a maximum depth of 4. Independently, loop/rep instructions can be nested to a maximum depth of 4.

Arbitrary Swizzle

Arbitrary swizzle is supported. See Arbitrary Swizzle.

Gradient Instructions

Gradient instructions are supported. See dsx, dsy, and texldd.


Instruction predication is supported. See Predicate.

Dependent Read Limit

There are no dependent read limits.

Texture Instruction Limit

There is no limit on texture instructions.

Instruction Count

Each pixel shader is allowed anywhere from 512 up to the number of slots in the MaxPixelShader30InstructionSlots member of D3DCAPS9 (not more than 32768). The number of instructions run can be much higher because of the looping support. The MaxPShaderInstructionsExecuted cap in D3DCAPS9 should be at least 2^16.

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